? semiconductor components industries, llc, 2000 november, 2000 rev. 0 1 publication order number: nttd1p02r2/d nttd1p02r2 product preview power mosfet -1.45 amps, -20 volts pchannel enhancement mode dual micro8 package features ? ultra low r ds(on) ? higher efficiency extending battery life ? logic level gate drive ? miniature dual micro8 surface mount package ? diode exhibits high speed, soft recovery ? micro8 mounting information provided applications ? power management in portable and batterypowered products, i.e.: computers, printers, pcmcia cards, cellular and cordless telephones maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v dss 20 v gatetosource voltage continuous v gs 8.0 v thermal resistance junctiontoambient (note 1.) total power dissipation @ t a = 25 c continuous drain current @ t a = 25 c continuous drain current @ t a = 70 c pulsed drain current (note 3.) r q ja p d i d i d i dm 250 0.50 1.45 1.15 10 c/w w a a a thermal resistance junctiontoambient (note 2.) total power dissipation @ t a = 25 c continuous drain current @ t a = 25 c continuous drain current @ t a = 70 c pulsed drain current (note 3.) r q ja p d i d i d i dm 125 1.0 2.04 1.64 16 c/w w a a a operating and storage temperature range t j , t stg 55 to +150 c single pulse draintosource avalanche energy starting t j = 25 c (v dd = 20 vdc, v gs = 4.5 vdc, peak i l = 3.5 apk, l = 5.6 mh, r g = 25 w ) e as 35 mj maximum lead temperature for soldering purposes for 10 seconds t l 260 c 1. minimum fr4 or g10 pcb, steady state. 2. mounted onto a 2 square fr4 board (1 sq. 2 oz cu 0.06 thick single sided), steady state. 3. pulse test: pulse width = 300 s, duty cycle = 2%. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. drain 1 (top view) 8 source 1 7 6 5 1 2 3 4 device package shipping ordering information nttd1p02r2 micro8 4000/tape & reel micro8 case 846a style 2 http://onsemi.com dual pchannel d s g gate 1 source 2 gate 2 drain 1 drain 2 drain 2 marking diagram & pin assignment 1 8 yww bc y = year ww = work week bc = device code 1.45 amperes 20 volts 160 m @ v gs = 4.5
nttd1p02r2 http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) * characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (v gs = 0 vdc, i d = 250 m adc) temperature coefficient (positive) v (br)dss 20 12 vdc mv/ c zero gate voltage drain current (v gs = 0 vdc, v ds = 20 vdc, t j = 25 c) (v gs = 0 vdc, v ds = 20 vdc, t j = 125 c) i dss 1.0 10 m adc gatebody leakage current (v gs = 8 vdc, v ds = 0 vdc) i gss 100 nadc gatebody leakage current (v gs = +8 vdc, v ds = 0 vdc) i gss 100 nadc on characteristics gate threshold voltage (v ds = v gs , i d = 250 m adc) temperature coefficient (negative) v gs(th) 0.7 0.95 2.3 1.4 vdc static draintosource onstate resistance (v gs = 4.5 vdc, i d = 1.45 adc) (v gs = 2.7 vdc, i d = 0.7 adc) (v gs = 2.5 vdc, i d = 0.7 adc) r ds(on) 0.130 0.175 0.190 0.160 0.250 w forward transconductance (v ds = 10 vdc, i d = 0.7 adc) g fs 2.5 mhos dynamic characteristics input capacitance (v 16 vd v 0vd c iss 265 pf output capacitance (v ds = 16 vdc, v gs = 0 vdc, f = 1.0 mhz ) c oss 100 reverse transfer capacitance f = 1 . 0 mhz) c rss 60 switching characteristics (notes 4. and 5.) turnon delay time t d(on) 10 ns rise time (v dd = 16 vdc, i d = 1.45 adc, t r 25 turnoff delay time (v dd 16 vdc , i d 1 . 45 adc , v gs = 4.5 vdc, r g = 6.0 w ) t d(off) 30 fall time t f 25 turnon delay time t d(on) 10 ns rise time (v dd = 16 vdc, i d = 0.7 adc, t r 20 turnoff delay time (v dd 16 vdc , i d 0 . 7 adc , v gs = 4.5 vdc, r g = 6.0 w ) t d(off) 30 fall time t f 20 total gate charge (v ds = 16 vdc, q tot 5.0 10 nc gatesource charge (v ds = 16 vdc , v gs = 4.5 vdc, i 145ad ) q gs 1.5 gatedrain charge gs i d = 1.45 adc) q gd 2.0 bodydrain diode ratings (note 4.) diode forward onvoltage (i s = 1.45 adc, v gs = 0 vdc) (i s = 1.45 adc, v gs = 0 vdc, t j = 125 c) v sd 0.91 0.72 1.1 vdc reverse recovery time (i 145ad v 0vd t rr 25 ns (i s = 1.45 adc, v gs = 0 vdc, di s /dt = 100 a/ m s ) t a 13 di s /dt = 100 a/ m s) t b 12 reverse recovery stored charge q rr 0.015 m c 4. indicates pulse test: pulse width = 300 m s max, duty cycle = 2%. 5. switching characteristics are independent of operating junction temperature. * handling precautions to protect against electrostatic discharge is mandatory.
nttd1p02r2 http://onsemi.com 3 v gs = 1.5 v 1.7 v t j = 55 c t j = 25 c figure 1. onregion characteristics figure 2. transfer characteristics figure 3. onresistance versus gatetosource voltage figure 4. onresistance versus drain current and gate voltage figure 5. onresistance variation with temperature figure 6. draintosource leakage current versus voltage t j = 25 c t j = 100 c i d = 1.45 a t j = 25 c t j = 25 c v gs = 2.7 v v gs = 4.5 v i d = 1.45 a v gs = 4.5 v v gs = 0 v t j = 125 c t j = 100 c v ds 10 v 150 50 1.6 1.4 25 0 25 75 1.2 1 0.8 0.6 20 4 100 81216 10 1 v ds, draintosource voltage (volts) 125 100 50 t j, junction temperature ( c) 0 0.3 0.2 0.5 1 1.5 2.5 0.1 0 3.5 3 2 0 0.4 0.3 48 0.2 0.1 0 12 0 0.5 2 3 2 0 3.5 0 3 2 1 0 1 2.5 0.25 i d, drain current (amps) v ds , draintosource voltage (volts) v gs , gatetosource voltage (volts) v gs, gatetosource voltage (volts) i d, drain current (amps) i d, drain current (amps) r ds(on), draintosource resistance (normalized) i dss, leakage (na) r ds(on), draintosource resistance ( ) 0.5 0.75 1 1.25 1.5 1.75 1.9 v 2.1 v 2.3 v 2.5 v 2.7 v 2.9 v 3.1 v 3.3 v 3.7 v 4.5 v 8 v 1 1.5 3 2610 r ds(on), draintosource resistance ( ) v gs = 2.5 v
nttd1p02r2 http://onsemi.com 4 v gs, gatetosource voltage (volts) t r t, time (ns) gatetosource or draintosource voltage (volts) t d (off) figure 7. capacitance variation figure 8. gatetosource and draintosource voltage versus total charge figure 9. resistive switching time variation versus gate resistance figure 10. diode forward voltage versus current figure 11. maximum rated forward biased safe operating area figure 12. diode reverse recovery waveform v ds = 0 v v gs = 0 v t j = 25 c c iss c rss c oss c iss c rss qt q2 v gs i d = 1.45 a t j = 25 c v ds v dd = 16 v i d = 1.45 a v gs = 4.5 v t f t d (on) v gs = 0 v t j = 25 c di/dt t rr t a t p i s 0.25 i s time i s t b 1 0 0.9 0.8 0.7 0.6 0.5 0.4 0.4 0.8 1.2 1.6 v sd, sourcetodrain voltage (volts) 1 100 10 1 10 100 r g, gate resistance (ohms) 0 4 0 3 5 1 2 4 123 56 20 10 800 600 5051015 400 200 0 q g , total gate charge (nc) i s, source current (amps) c, capacitance (pf) v ds v gs 20 18 16 14 12 10 8 6 4 2 0 v ds, draintosource voltage (volts) 0.1 v ds , draintosource voltage (volts) 0.01 1 i d , drain current (amps) r ds(on) limit thermal limit package limit v gs = 8 v single pulse t c = 25 c 10 dc 1 100 100 10 10 ms 1 ms 0.1 q1 100 s
nttd1p02r2 http://onsemi.com 5 typical electrical characteristics figure 13. thermal response t, time (s) 100 10 1 d = 0.5 single pulse 1.0e05 1.0e04 1.0e03 1.0e02 1.0e01 1.0e+00 1.0e+01 0.2 0.05 0.01 1.0e+02 1.0e+03 0.1 1000 0.1 0.02 r q jc (t) = r(t) r q jc d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) r q jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 rthja(t), effective transient thermal resistance ( c/w) information for using the micro8 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will selfalign when subjected to a solder reflow process. mm inches 0.041 1.04 0.208 5.28 0.015 0.38 0.0256 0.65 0.126 3.20
nttd1p02r2 http://onsemi.com 6 soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. typical solder heating profile for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 14 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems, but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. step 1 preheat zone 1 ramp" step 2 vent soak" step 3 heating zones 2 & 5 ramp" step 4 heating zones 3 & 6 soak" step 5 heating zones 4 & 7 spike" step 6 vent step 7 cooling 200 c 150 c 100 c 50 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies 100 c 150 c 160 c 170 c 140 c desired curve for high mass assemblies figure 14. typical solder heating profile.
nttd1p02r2 http://onsemi.com 7 tape & reel information micro8 dimensions are shown in millimeters (inches) feed direction section aa notes: 1. conforms to eia4811. 2. controlling dimension: millimeter. pin number 1 notes: 1. conforms to eia4811. 2. controlling dimension: millimeter. 3. includes flange distortion at outer edge. 4. dimension measured at inner hub. 12.30 4.10 (.161) 11.70 (.484) (.461) 1.85 (.072) 3.90 (.154) 2.05 (.080) 1.95 (.077) bba a 8.10 (.318) 7.90 (.312) 5.55 (.218) 5.45 (.215) 1.65 (.065) 1.60 (.063) 1.50 (.059) 1.60 (.063) 1.50 (.059) typ. 0.35 (.013) 0.25 (.010) 3.50 (.137) 3.30 (.130) 1.50 (.059) 1.30 (.052) section bb 5.40 (.212) 5.20 (.205) 330.0 (13.20) max. 50.0 (1.97) min. 14.4 (.57) 12.4 (.49) note 4 18.4 (.724) max. note 3 13.2 (.52) 12.8 (.50)
nttd1p02r2 http://onsemi.com 8 package dimensions s b m 0.08 (0.003) a s t dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c --- 1.10 --- 0.043 d 0.25 0.40 0.010 0.016 g 0.65 bsc 0.026 bsc h 0.05 0.15 0.002 0.006 j 0.13 0.23 0.005 0.009 k 4.75 5.05 0.187 0.199 l 0.40 0.70 0.016 0.028 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. b a d k g pin 1 id 8 pl 0.038 (0.0015) t seating plane c h j l micro8 case 846a02 issue e style 2: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nttd1p02r2/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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